The Transistor Was the Easy Part
The next decade in chips will be won on integration, not invention.
For fifty years, a better chip meant one thing: a smaller transistor. Every roadmap, every fab, every $300M lithography machine pointed at the same lever. Shrink the feature, double the density, wait two years, repeat. That lever has largely stopped moving, and if you are not TSMC it stopped a while ago. The reflex is to read this as the end of something. We read it as the start of the most interesting decade in hardware since the integrated circuit itself.
The reason is a collision. Demand for compute is going vertical at the exact moment the one trick the whole industry relied on has run out of room. Power, not chips, is now the binding constraint on AI: this year alone billions of dollars of datacenter capacity has been delayed or cancelled not for lack of funding or silicon, but because the grid cannot deliver electrons fast enough. And a large share of the energy we do deliver is spent not computing but shuttling data between memory and processor. But progress does not stop. It moves, and right now it is moving in three directions at once: new materials, new geometries, and new architectures.
New materials. There is a class of device that holds memory and does the computation in one place, the way a synapse does, instead of separating the two. The physics has been understood for roughly two decades and the performance ceiling is enormous, but none of these devices are in production. The reason: the materials involved have historically been impossible to build into a normal silicon chip without destroying the transistors underneath.
New geometries. Photonic chips do not need three-nanometer features. They need three-dimensional, multi-material, wavelength-scale structures that the world’s most expensive machines were simply never built to make. The unlock there is not smaller. It is a different shape entirely, and the tools optimized for shrinking transistors cannot produce it.
New architectures. Once you can co-locate memory and compute, you get to attack the von Neumann bottleneck directly rather than papering over it with faster interconnects and more cache. The prize is doing the core operation of a neural network in a single physical step instead of thousands of read-write shuffles. That is where the order-of-magnitude efficiency gains live. And when power is the constraint, efficiency is the only thing that matters.
In every one of these cases, the breakthrough is not the invention. It is the integration. The exotic material, the photonic structure, and the analog crossbar have existed in labs for years. What’s been missing is a way to manufacture them at scale without throwing away the trillion-dollar silicon supply chain. The companies we think win this decade are those who figure out how to build these devices on machines the fabs already own, inside an existing process. Complement the incumbent, do not try to replace it. The moat moved from what you can invent to what you can integrate, and that is a much less crowded, much more defensible place to stand.
This reframes what we look for. In diligence, we care less about a benchmark from a clean-room prototype than whether the process survives contact with a real foundry, which is where almost everyone stalls. It also reopens the map. The leading-edge logic race is lost outside Taiwan and a single town in the Netherlands, but the new wedges are early, unoptimized, and open to new entrants in a way the transistor race has not been for thirty years. That is why the best teams we see are not trying to out-TSMC TSMC. They are building what TSMC was never designed to build.
Why now? AI created both halves of the opportunity. It created the demand by making energy efficiency existential. And it supplied the tools to meet it: cheap GPU compute, better lasers, a consolidated supply chain. These approaches turned viable in the last twenty-four months, not the last twenty years. The constraint and the cure arrived together.